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19-3983; Rev 0; 1/06
KIT ATION EVALU ABLE AVAIL
TFT, LCD, DC-DC Converter with Operational Amplifiers
Features
1.8V to 5.5V Input Supply Range 600kHz/1.2MHz Current-Mode Step-Up Regulator Fast Transient Response to Pulsed Load High-Accuracy Output Voltage (1.5%) Built-In 14V, 1.9A, 0.2 n-Channel MOSFET High Efficiency (> 85%) Digital Soft-Start Two High-Performance Operational Amplifiers 150mA Output Short-Circuit Current 7.5V/s Slew Rate 12MHz, -3dB Bandwidth Rail-to-Rail Inputs/Outputs Logic-Controlled, High-Voltage Switch with Adjustable Delay Built-In Power-Up Sequence Input Supply Undervoltage Lockout Timer Delay Fault Latch for All Regulator Outputs Thermal-Overload Protection
General Description
The MAX8739 includes a high-performance, step-up regulator and two high-current operational amplifiers for active-matrix thin-film transistor (TFT) liquid-crystal displays (LCDs). The input supply voltage range of the MAX8739 is from 1.8V to 5.5V. The device also includes a logic-controlled, high-voltage switch with adjustable delay. The step-up DC-DC converter provides the regulated supply voltage for the panel source driver ICs. The converter is a high-frequency (600kHz/1.2MHz) currentmode regulator with an integrated 14V n-channel MOSFET that allows the use of ultra-small inductors and ceramic capacitors. It provides fast transient response to pulsed loads while achieving efficiencies over 85%. The two high-performance operational amplifiers are designed to drive the LCD backplane (VCOM) and/or the gamma-correction-divider string. The devices feature high output current (150mA), fast slew rate (7.5V/s), wide bandwidth (12MHz), and rail-to-rail inputs and outputs. The MAX8739 is available in a 20-pin, 5mm x 5mm thin QFN package with a maximum thickness of 0.8mm for ultra-thin LCD panels.
MAX8739
Applications
Notebook Computer Displays LCD Monitor Panels Automotive Displays
Simplified Operating Circuit
VIN +1.8V TO +5.5V LX IN FB MAX8739 FREQ COMP NEG1 OUT1 TO VCOM BACKPLANE NEG2 OUT2 LDO POS1 POS2 AGND PGND SUP
VMAIN
Ordering Information
PART MAX8739ETP+ TEMP RANGE -40C to +85C PIN-PACKAGE PKG CODE
20 Thin QFN-EP* T2055-2 (5mm x 5mm)
+ Denotes lead-free package. * EP = Exposed pads.
DEL
Pin Configuration appears at end of data sheet.
FROM TCON CTL
SRC DRN COM
________________________________________________________________ Maxim Integrated Products
1
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TFT, LCD, DC-DC Converter with Operational Amplifiers MAX8739
ABSOLUTE MAXIMUM RATINGS
IN, CTL, FREQ, LDO to AGND .................................-0.3V to +6V COMP, FB, DEL to AGND ........................-0.3V to (VLDO + 0.3V) PGND to AGND ..................................................................0.3V LX to PGND ............................................................-0.3V to +14V SUP to AGND .........................................................-0.3V to +14V POS1, POS2, NEG1, NEG2, OUT1, OUT2 to AGND .....................................-0.3V to (VSUP + 0.3V) SRC to AGND .........................................................-0.3V to +30V COM, DRN to AGND ................................-0.3V to (VSRC + 0.3V) COM RMS Output Current................................................50mA OUT1, OUT2 Maximum Continuous Output Current ........75mA LX Switch Maximum Continuous RMS Output Current .........1.6A Continuous Power Dissipation (TA = +70C) 20-Pin, 5mm x 5mm, Thin QFN (derate 20.8mW/C above +70C).............................................................1667mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN = 2.5V, VSUP = 10V, VSRC = 28V, FREQ = CTL = IN, PGND = AGND = 0, TA = 0C to +85C. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER IN Supply Range IN Quiescent Current IN Undervoltage Lockout Threshold LDO Output Voltage LDO Undervoltage Lockout Threshold LDO Output Current SUP Supply Voltage Range SUP Undervoltage Fault Threshold SUP Supply Current Thermal Shutdown STEP-UP REGULATOR Operating Frequency Maximum Duty Cycle FREQ Input Low Voltage FREQ Input High Voltage FREQ Pulldown Current FB Regulation Voltage FB Fault Trip Level Duration to Trigger Fault Condition FREQ = AGND FREQ = IN FREQ = AGND FREQ = IN VIN = 1.8V to 5.5V VIN = 1.8V to 2.4V VIN = 2.4V to 5.5V VFREQ = 1.0V ISWITCH = 200mA Falling edge FREQ = AGND FREQ = IN 1.4 2.0 3.5 1.225 0.96 43 47 5.0 1.240 1.00 51 55 6.0 1.255 1.04 64 65 512 1020 91 88 600 1200 95 92 768 1380 99 96 0.6 kHz % V V A V V ms VPOS_ = 4V, no load Rising edge, 15C hysteresis LX not switching LX switching 1.8 16 +160 VIN = 2.5V, VFB = 1.5V IN rising, 200mV hysteresis 6V VSUP 13V, ILDO = 12.5mA LDO rising, 200mV hysteresis 4.6 2.4 15 4.5 13.0 1.4 3.0 30 CONDITIONS MIN 1.8 15 1.30 5 2.7 TYP MAX 5.5 30 1.75 5.4 3.0 UNITS V A V V V mA V V mA C
2
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TFT, LCD, DC-DC Converter with Operational Amplifiers
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 2.5V, VSUP = 10V, VSRC = 28V, FREQ = CTL = IN, PGND = AGND = 0, TA = 0C to +85C. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER FB Load Regulation FB Line Regulation FB Input Bias Current FB Transconductance FB Voltage Gain LX On-Resistance LX Leakage Current LX Current Limit Current-Sense Transresistance Soft-Start Period Soft-Start Step Size OPERATIONAL AMPLIFIERS Input Offset Voltage Input Bias Current Input Common-Mode Voltage Range Common-Mode Rejection Ratio Open-Loop Gain IOUT_ = 100A Output Voltage Swing High IOUT_ = 5mA Output Voltage Swing Low Short-Circuit Current Output Source-and-Sink Current Power-Supply Rejection Ratio Slew Rate -3dB Bandwidth Gain-Bandwidth Product DEL Capacitor Charge Current DEL Turn-On Threshold DEL Pin Discharge Switch OnResistance CTL Input-Low Voltage During UVLO, VIN = 1.3V VIN = 1.8V to 5.5V RL = 10k, CL = 10pF, buffer configuration Buffer configuration During startup, VDEL = 1V 4 1.178 IOUT_ = -100A IOUT_ = -5mA To VSUP/2 Source Sink 50 50 40 60 100 7.5 12 8 5 1.24 20 0.6 6 1.302 VSUP 150 VSUP 80 2 80 150 140 15 150 mV mA mA dB V/s MHz MHz A V V VSUP 15 VCM = VSUP/2, TA = +25C NEG1, POS1, NEG2, POS2 NEG1, POS1, NEG2, POS2 0 VNEG_, VPOS_ VSUP -50 0 50 90 125 VSUP 2 mV 0 +1 12 +50 VSUP mV nA V dB dB FREQ = AGND FREQ = IN VIN = 1.8V to 5.5V VFB = 1.3V ICOMP = 5A FB to COMP ILX = 200mA VLX = VSUP = 13V VFB = 1.1V, duty cycle = 65% 1.5 0.22 75 CONDITIONS 0 < ILOAD < 200mA, transient only -0.15 MIN TYP -1 -0.08 125 160 700 200 0.01 1.9 0.36 13 14 0.24 400 20 2.3 0.50 +0.15 200 280 MAX UNITS % %/V nA S V/V m A A V/A ms A
MAX8739
Buffer configuration, VPOS_ = 4V, |VOS| < 10mV DC, 6V VSUP 13V, VPOS_, VNEG_ = VSUP/2
POSITIVE GATE-DRIVER TIMING AND CONTROL SWITCHES
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3
TFT, LCD, DC-DC Converter with Operational Amplifiers MAX8739
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 2.5V, VSUP = 10V, VSRC = 28V, FREQ = CTL = IN, PGND = AGND = 0, TA = 0C to +85C. Typical values are at TA = +25C, unless otherwise noted.)
PARAMETER CTL Input-High Voltage CTL Input-Leakage Current CTL-to-SRC Propagation Delay SRC Input-Voltage Range SRC Input Current DRN Input Current SRC-to-COM Switch OnResistance DRN-to-COM Switch OnResistance VDRN = 8V, CTL = AGND, VDEL = 1.5V VDRN = 8V, CTL = IN, VDEL = 1.5V VDRN = 8V, CTL = AGND, VDEL = 1.5V VDEL = 1.5V, CTL = IN VDEL = 1.5V, CTL = AGND 15 100 90 15 30 VIN = 1.8V to 2.4V VIN = 2.4V to 5.5V CTL = AGND or IN COM falling, no load on COM COM rising, no load on COM CONDITIONS MIN 1.4 2.0 -1 100 100 28 30 180 150 30 60 +1 TYP MAX UNITS V A ns V A A
ELECTRICAL CHARACTERISTICS
(VIN = 2.5V, VSUP = 10V, VSRC = 28V, FREQ = CTL = IN, PGND = AGND = 0, TA = -40C to +85C, unless otherwise noted.) (Note 1)
PARAMETER IN Supply Range IN Quiescent Current IN Undervoltage Lockout Threshold LDO Output Voltage LDO Undervoltage Lockout Threshold LDO Output Current SUP Supply Voltage Range SUP Undervoltage Fault Threshold SUP Supply Current STEP-UP REGULATOR Operating Frequency Maximum Duty Cycle FREQ Input Low Voltage FREQ = AGND FREQ = IN FREQ = AGND FREQ = IN VIN = 1.8V to 5.5V 512 1020 91 88 768 1380 99 96 0.6 kHz % V VPOS_ = 4V, no load LX not switching LX switching VIN = 2.5V, VFB = 1.5V IN rising, 200mV hysteresis 6V VSUP 13V, ILDO = 12.5mA LDO rising, 200mV hysteresis 4.6 2.4 15 4.5 13.0 1.4 3.0 30 CONDITIONS MIN 1.8 TYP MAX 5.5 30 1.75 5.4 3.0 UNITS V A V V V mA V V mA
4
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TFT, LCD, DC-DC Converter with Operational Amplifiers
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 2.5V, VSUP = 10V, VSRC = 28V, FREQ = CTL = IN, PGND = AGND = 0, TA = -40C to +85C, unless otherwise noted.) (Note 1)
PARAMETER FREQ Input-High Voltage FREQ Pulldown Current FB Regulation Voltage FB Fault-Trip Level Duration to Trigger-Fault Condition FB Line Regulation FB Input Bias Current FB Transconductance LX On-Resistance LX Current Limit Current-Sense Transresistance OPERATIONAL AMPLIFIERS Input Offset Voltage Input Common-Mode Voltage Range Common-Mode Rejection Ratio VCM = VSUP/2, TA = +25C NEG1, POS1, NEG2, POS2 0 VNEG_, VPOS_ VSUP IOUT_ = 100A Output Voltage Swing High IOUT_ = 5mA Output Voltage Swing Low Short-Circuit Current Output Source-and-Sink Current Power-Supply Rejection Ratio IOUT_ = -100A IOUT_ = -5mA To VSUP/2 Source Sink 50 50 40 60 0 50 VSUP 15 VSUP 150 15 150 12 VSUP mV V dB VIN = 1.8V to 2.4V VIN = 2.4V to 5.5V VFREQ = 1.0V ISWITCH = 200mA Falling edge FREQ = AGND FREQ = IN VIN =1.8V to 5.5V VFB = 1.3V ICOMP = 5A ILX = 200mA VFB = IV, duty cycle = 65% 1.5 0.22 75 CONDITIONS MIN 1.4 2.0 3.5 1.220 0.96 41 47 -0.15 6.0 1.260 1.04 64 65 +0.15 200 280 400 2.3 0.50 TYP MAX UNITS V A V V ms %/V nA S m A V/A
MAX8739
mV
mV mA mA dB
Buffer configuration, VPOS_ = 4V, |VOS| < 10mV DC, 6V VSUP 13V, VPOS_, VNEG_ = VSUP/2
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5
TFT, LCD, DC-DC Converter with Operational Amplifiers MAX8739
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 2.5V, VSUP = 10V, VSRC = 28V, FREQ = CTL = IN, PGND = AGND = 0, TA = -40C to +85C, unless otherwise noted.) (Note 1)
PARAMETER DEL Capacitor Charge Current DEL Turn-On Threshold CTL Input-Low Voltage CTL Input-High Voltage SRC Input-Voltage Range SRC Input Current DRN Input Current SRC-to-COM Switch OnResistance DRN-to-COM Switch OnResistance VDRN = 8V, CTL = AGND, VDEL = 1.5V VDRN = 8V, CTL = IN, VDEL = 1.5V VDRN = 8V, CTL = AGND, VDEL = 1.5V VDEL = 1.5V, CTL = IN VDEL = 1.5V, CTL = AGND VIN = 1.8V to 5.5V VIN = 1.8V to 2.4V VIN = 2.4V to 5.5V 1.4 2.0 28 30 180 150 30 60 CONDITIONS During startup, VDEL = 1V MIN 4 1.178 TYP MAX 6 1.302 0.6 UNITS A V V V V A A
POSITIVE GATE-DRIVER TIMING AND CONTROL SWITCHES
Note 1: Specifications to -40C are guaranteed by design, not production tested.
Typical Operating Characteristics
(Circuit of Figure 1, VIN = 2.5V, VMAIN = 8V, FREQ = IN, TA = +25C, unless otherwise noted.)
STEP-UP REGULATOR EFFICIENCY vs. LOAD CURRENT
MAX8739toc01
STEP-UP REGULATOR EFFICIENCY vs. LOAD CURRENT
90 80 EFFICIENCY (%) 70 60 50 40 30 VIN = 1.8V VIN = 3.3V VIN = 5V
MAX8739toc02
STEP-UP REGULATOR LOAD REGULATION
MAX8739toc03
100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 1 10 100 VIN = 1.8V fSW = 1.2MHz VOUT = 8V L = 3.0H VIN = 3.3V VIN = 5V
100
0.5 0 VOLTAGE ACCURACY (%) -0.5 VIN = 1.8V -1.0 -1.5 VIN = 3.3V -2.0 -2.5 fSW = 1.2MHz VOUT = 8V 1 10 100 VIN = 5V
20 10 0 1 10
fSW = 600MHz VOUT = 8V L = 6.2H 100 1000
1000
1000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
6
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TFT, LCD, DC-DC Converter with Operational Amplifiers MAX8739
Typical Operating Characteristics
(Circuit of Figure 1, VIN = 2.5V, VMAIN = 8V, FREQ = IN, TA = +25C, unless otherwise noted.)
IN SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX8739toc04
IN SUPPLY CURRENT vs. TEMPERATURE
MAX8739toc05
SWITCHING FREQUENCY vs. INPUT VOLTAGE
FREQ = IN SWITCHING FREQUENCY (kHz) 1200
MAX8739toc06
50
30 VIN = 3.3V IN SUPPLY CURRENT (A) 28 SWITCHING 26
1400
IN SUPPLY CURRENT (A)
40
SWITCHING
30
1000
20 NOT SWITCHING 10
24 NOT SWITCHING 22
800
FREQ = GND
600
0 1 2 3 4 5 6 SUPPLY VOLTAGE (V)
20 -50 -20 10 40 70 100 TEMPERATURE (C)
400 1 2 3 4 5 6 INPUT VOLTAGE (V)
STEP-UP REGULATOR SOFT-START (HEAVY LOAD)
MAX8739toc07
STEP-UP REGULATOR LOAD-TRANSIENT RESPONSE
A 0V B 0V B
MAX8739toc08
STEP-UP REGULATOR PULSED LOAD-TRANSIENT RESPONSE
0V A
MAX8739toc09
A 0V
B
C OA
0A C OA 20s/div A: VMAIN, AC-COUPLED, 200mV/div B: INDUCTOR CURRENT, 500mA/div C: LOAD CURRENT, 500mA/div
0A C OA
2ms/div A: VIN, 2V/div B: VMAIN, 5V/div C: INDUCTOR CURRENT, 1A/div
20s/div A: VMAIN, AC-COUPLED, 200mV/div B: INDUCTOR CURRENT, 500mA/div C: LOAD CURRENT, 500mA/div
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TFT, LCD, DC-DC Converter with Operational Amplifiers MAX8739
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VIN = 2.5V, VMAIN = 8V, FREQ = IN, TA = +25C, unless otherwise noted.)
TIMER DELAY LATCH RESPONSE TO OVERLOAD
MAX8739toc10
POWER-UP SEQUENCE
MAX8739toc11
SUP SUPPLY CURRENT vs. SUP VOLTAGE
A B SUP CURRENT (mA) 8 SWITCHING
MAX8739toc12
10
A 0V B
C 0V D C 53ms OA E
6
4 NOT SWITCHING 2
10ms/div A: VIN, 2V/div B: VMAIN, 5V/div C: INDUCTOR CURRENT, 2A/div A: VLDO, 5V/div B: VMAIN, 5V/div C: VSRC, 20V/div D: VGON, 20V/div E: VGOFF, 5V/div
0 2ms/div 4 6 8 SUP VOLTAGE (V) 10 12
SUP SUPPLY CURRENT vs. TEMPERATURE
MAX8739toc13
OPERATIONAL-AMPLIFIER FREQUENCY RESPONSE
MAX8739toc14
OPERATIONAL-AMPLIFIER RAIL-TO-RAIL INPUT/OUTPUT
BUFFER CONFIGURATION
MAX8739toc15
10 VSUP = 8V VIN = 3.3V SUP SUPPLY CURRENT (mA) 8 SWITCHING 6
4 BUFFER CONFIGURATION 2 0 GAIN (dB) -2 -4 -6 -8 -10 RL = 10k CL = 1000pF AV = 1 VSUP = 8V 100k 1M FREQUENCY (Hz)
A 0V
4 NOT SWITCHING 2
B 0A
0 -50 -20 10 40 70 100 TEMPERATURE (C)
10M
10s/div A: BUFFER INPUT, 5V/div B: BUFFER OUTPUT, 5V/div
8
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TFT, LCD, DC-DC Converter with Operational Amplifiers MAX8739
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VIN = 2.5V, VMAIN = 8V, FREQ = IN, TA = +25C, unless otherwise noted.)
OPERATIONAL-AMPLIFIER LOAD TRANSIENT RESPONSE
MAX8739toc16
OPERATIONAL-AMPLIFIER LARGE-SIGNAL STEP RESPONSE
A 0V
MAX8739toc17
A 0V
B 0A
B 0V
1s/div
1s/div A: OUTPUT VOLTAGE, AC-COUPLED, 2V/div B: OUTPUT CURRENT, 50mA/div
A: INPUT VOLTAGE, 5V/div B: OUTPUT VOLTAGE, 5V/div
OPERATIONAL-AMPLIFIER SMALL-SIGNAL STEP RESPONSE
MAX8739toc18
SWITCH CONTROL FUNCTION
A 0V RDRN = 5k CGON = 1.5nF
MAX8739toc19
A
0V
B 0V
B 0V
4s/div A: INPUT VOLTAGE, AC-COUPLED 50mV/div B: OUTPUT VOLTAGE, AC-COUPLED 50mV/div A: VGON, 10V/div B: VCTL, 2V/div
20s/div
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9
TFT, LCD, DC-DC Converter with Operational Amplifiers MAX8739
Pin Description
PIN 1 2 3 NAME COM SRC LDO FUNCTION Internal High-Voltage MOSFET Switch Common Terminal Switch Input. Source of the internal high-voltage, p-channel MOSFET. Bypass SRC to PGND with a minimum of 0.1F close to the pins. Internal 5V Linear Regulator Output. This regulator powers all internal circuitry except OUT1 and OUT2 operational amplifiers. Bypass LDO to AGND with a 0.22F or greater ceramic capacitor. Power Ground. PGND is the source of the step-up regulator's n-channel power MOSFET. Connect PGND to the input capacitor ground terminals through a short, wide PC board trace. Connect PGND to analog ground (AGND) underneath the IC. Analog Ground. Connect AGND to power ground (PGND) underneath the IC. Operational Amplifier 1 Noninverting Input Operational Amplifier 1 Inverting Input Operational Amplifier 1 Output Operational Amplifier 2 Output Operational Amplifier 2 Inverting Input Operational Amplifier 2 Noninverting Input Operational-Amplifier Supply Input. SUP is the positive supply rail for the OUT1 and OUT2 amplifiers. SUP is also the supply input of the internal 5V linear regulator. Connect SUP to the main step-up regulator output and bypass SUP to AGND with a 0.1F capacitor. n-Channel Power MOSFET Drain and Switching Node. Connect the inductor and the catch diode to LX and minimize the trace area for lowest EMI. Supply Voltage. IN can range from 1.8V to 5.5V. Oscillator Frequency-Select Input. Pull FREQ low or leave it unconnected for 600kHz operation. Connect FREQ to IN for 1.2MHz operation. This input has a 5A pulldown. Step-Up Regulator Feedback Input. Regulates to 1.24V (nominal). Connect a resistive voltage-divider from the output (VMAIN) to FB to analog ground (AGND). Place the divider within 5mm of FB. Step-Up Regulator Error-Amplifier Compensation Point. Connect a series resistor and capacitor from COMP to AGND. See the Loop Compensation section for component selection guidelines. High-Voltage Switch-Delay Input. Connect a capacitor from DEL to AGND to set the high-voltage switch startup delay. A 5A current source charges CDEL. The switches between SRC, COM, and DRN are disabled during the delay period. High-Voltage Switch-Control Input. When CTL is high, the high-voltage switch between COM and SRC is on and the high-voltage switches between COM and DRN are off. When CTL is low, the high-voltage switch between COM and SRC is off and the high-voltage switches between COM and DRN are on. CTL is inhibited by the undervoltage lockout and when VDEL is less than 1.24V. Switch Input. Drain of the internal, high-voltage, back-to-back p-channel MOSFETs connected to COM. Exposed Pad
4 5 6 7 8 9 10 11 12
PGND AGND POS1 NEG1 OUT1 OUT2 NEG2 POS2 SUP
13 14 15 16 17
LX IN FREQ FB COMP
18
DEL
19
CTL
20 --
DRN EP
10
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TFT, LCD, DC-DC Converter with Operational Amplifiers
Typical Application Circuit
The MAX8739 typical application circuit (Figure 1) generates a +8V source-driver supply and approximately +22V and -7V gate-driver supplies for TFT displays. The input-voltage range for the IC is from +1.8V to +5.5V but the Figure 1 circuit is designed to run from 1.8V to 2.7V. Table 1 lists the key recommended components and Table 2 lists the contact information of the component suppliers.
MAX8739
C15 0.1mF C14 0.1mF
VGOFF -7V/20mA C13 0.1F
D2
C16 0.1mF
D4 C17 0.1F D3 D1 R1 169k 1% C2 4.7F 10V C3 4.7F 10V C18 0.1F
VIN +1.8V TO +2.7V C1 10F 6.3V 100k
L1 3.0H
VMAIN +8V/250mA
R4 10 C4 1F IN
LX FB
MAX8739
R3 100k C5 220pF C6 33pF FREQ COMP AGND PGND SUP NEG1 OUT1 TO VCOM BACKPLANE NEG2 OUT2 LDO C7 1F DEL C8 0.033F CTL SRC DRN COM POS1 POS2
R2 30.9k 1%
C10 0.1F R5* R7*
C11 0.1F
C12 0.1F
R6*
R8*
VGON +22V/10mA
R9 5k
FROM TCON
*THE RATIO OF THE VOLTAGE DIVIDER DEPENDS ON THE EXACT APPLICATION REQUIREMENTS. USE RESISTORS IN THE 100k AND 500k RANGE.
Figure 1. Typical Application Circuit ______________________________________________________________________________________ 11
TFT, LCD, DC-DC Converter with Operational Amplifiers MAX8739
VIN LX
MAX8739
IN LDO STEP-UP REGULATOR CONTROLLER PGND
LINEAR REGULATOR AND BOOTSTRAP FREQ
FB
COMP NEG1
SRC
OUT1
DRN
POS1 NEG1
COM
SWITCH CONTROL OUT2
CTL POS2 AGND
DEL
Figure 2. Functional Diagram
Table 1. Key Components List
DESIGNATION C1 C2, C3 D1 DESCRIPTION 10F, 6.3V X5R ceramic capacitor (1206) TDK C3216X5ROJ106M 4.7F, 10V X5R ceramic capacitors (1206) TDK C3216X5R1A475M 3A, 30V Schottky diode (M-flat) Toshiba CMS02 200mA, 100V, dual, ultra-fast diodes (SOT23) Fairchild MMBD4148SE 3.0H, 2.3A inductor Sumida CDRH6D12-3R0
Detailed Description
The MAX8739 contains a high-performance, step-up switching regulator, two high-current operational amplifiers, and startup timing and level-shifting functionality useful for active-matrix TFT LCDs. Figure 2 shows the MAX8739 functional diagram.
Main Step-Up Regulator
The main step-up regulator employs a current-mode, fixed-frequency PWM architecture to maximize loop bandwidth and provide fast transient response to pulsed loads found in source drivers of TFT LCD panels. The high-switching frequency (600kHz/1.2MHz) allows the use of low-profile inductors and ceramic capacitors to minimize the thickness of LCD panel designs. The integrated, high-efficiency MOSFET and the IC's built-in digital soft-start functions reduce the number of external components required while controlling
D2, D3, D4
L1
12
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TFT, LCD, DC-DC Converter with Operational Amplifiers MAX8739
Table 2. Component Suppliers
SUPPLIER Fairchild Sumida TDK Toshiba PHONE 408-822-2000 847-545-6700 847-803-6100 949-455-2000 FAX 408-822-2102 847-545-6720 847-390-4405 949-859-3963 www.sumida.com www.component.tdk.com www.toshiba.com/taec WEBSITE www.fairchildsemi.com
inrush current. The output voltage can be set from VIN to 13V with an external resistive voltage-divider. The regulator controls the output voltage and the power delivered to the output by modulating the duty cycle (D) of the internal power MOSFET in each switching cycle. The duty cycle of the MOSFET is approximated by: D VMAIN - VIN VMAIN
CLOCK LOGIC AND DRIVER
LX
PGND ILIM COMPARATOR SOFTSTART SLOPE COMP PWM COMPARATOR
ILIMIT
Figure 3 shows the block diagram of the step-up regulator. An error amplifier compares the signal at FB to 1.24V and changes the COMP output. The voltage at COMP determines the current trip point each time the internal MOSFET turns on. As the load varies, the error amplifier sources or sinks current to the COMP output accordingly to produce the inductor peak current necessary to service the load. To maintain stability at high duty cycles, a slope compensation signal is summed with the current-sense signal. On the rising edge of the internal clock, the controller sets a flip-flop, turning on the n-channel MOSFET and applying the input voltage across the inductor. The current through the inductor ramps up linearly, storing energy in its magnetic field. Once the sum of the current-feedback signal and the slope compensation exceed the COMP voltage, the controller resets the flipflop and turns off the MOSFET. Since the inductor current is continuous, a transverse potential develops across the inductor that turns on the diode (D1). The voltage across the inductor then becomes the difference between the output voltage and the input voltage. This discharge condition forces the current through the inductor to ramp back down, transferring the energy stored in the magnetic field to the output capacitor and the load. The MOSFET remains off for the rest of the clock cycle.
SS
OSCILLATOR
CURRENT SENSE
FAULT COMPARATOR TO FAULT LOGIC 1.0V 1.24V COMP FREQ ERROR AMP
FB
Figure 3. Step-Up Regulator Block Diagram
rail-to-rail input and output capability maximize system flexibility. Short-Circuit Current Limit The operational amplifiers limit short-circuit current to approximately 150mA if the output is directly shorted to SUP or to AGND. If the short-circuit condition persists, the junction temperature of the IC rises until it reaches the thermal-shutdown threshold (+160C typ). Once the junction temperature reaches the thermalshutdown threshold, an internal thermal sensor immediately sets the thermal fault latch, shutting off all the IC's outputs. The device remains inactive until the input voltage is cycled. Driving Pure Capacitive Loads The operational amplifiers are typically used to drive the LCD backplane (VCOM) or the gamma-correctiondivider string. The LCD backplane consists of a distrib13
Operational Amplifiers
The MAX8739 has two operational amplifiers that are typically used to drive the LCD backplane (VCOM) and/or the gamma-correction-divider string. The operational amplifiers feature 150mA output short-circuit current, 7.5V/s slew rate, and 12MHz bandwidth. The
______________________________________________________________________________________
TFT, LCD, DC-DC Converter with Operational Amplifiers
uted series capacitance and resistance, a load that can be easily driven by the operational amplifier. However, if the operational amplifier is used in an application with a pure capacitive load, steps must be taken to ensure stable operation. As the operational amplifier's capacitive load increases, the amplifier's bandwidth decreases and gain peaking increases. A 5 to 50 resistor placed between OUT_ and the capacitive load reduces peaking but also reduces the gain. An alternative method of reducing peaking is to place a series RC network (snubber) in parallel with the capacitive load. The RC network does not continuously load the output or reduce the gain. Typical values of the resistor are between 100 and 200 and the typical value of the capacitor is 10pF.
MAX8739
regulator is complete, a 5A current source charges CDEL. Once the capacitor voltage exceeds VREF (1.25V typ), COM can be connected to SRC or DRN through the internal p-channel switches, depending upon the state of CTL. Before startup and when IN is less than VUVLO, DEL is internally connected to AGND to discharge CDEL. Select CDEL to set the delay time using the following equation: CDEL = DELAY _ TIME x 5A 1.25V
Switch Control and Delay
A capacitor CDEL (C8 in Figure 1), from DEL to AGND selects the switch-control block supply startup delay. After the LDO voltage exceeds its undervoltage lockout threshold (2.7V typ) and the soft-start routine for each
The switch-control input (CTL) is not activated until all three of the following conditions are satisfied: the LDO voltage exceeds its undervoltage lockout voltage, the soft-start routine of all the regulators is complete, and VDEL exceeds its turn-on threshold. Once activated and if CTL is high, the 15 internal p-channel switch between COM and SRC (Q1) turns on and the 30 pchannel switch between DRN and COM (Q2) turns off. If CTL is low, Q1 turns off and Q2 turns on.
LDO 5A
2.7V
SRC
DLP
Q1
REF
COM
CTL Q2
DRN
Figure 4. Switch Control 14 ______________________________________________________________________________________
TFT, LCD, DC-DC Converter with Operational Amplifiers
Undervoltage Lockout (UVLO)
The undervoltage lockout (UVLO) circuit compares the input voltage at IN with the UVLO threshold (1.26V rising and 1.1V falling) to ensure that the input voltage is high enough for reliable operation. The 200mV (typ) hysteresis prevents supply transients from causing a restart. Once the input voltage exceeds the UVLO rising threshold, startup begins. When the input voltage falls below the UVLO falling threshold, the controller turns off the main step-up regulator and the linear regulator outputs, disables the switch-control block, and the operational amplifier outputs are high impedance. outputs. Once the fault condition is removed, cycle the input voltage to clear the fault latch and reactivate the device. The fault-detection circuit is disabled during the soft-start time. The MAX8739 monitors the SUP voltage for undervoltage and overvoltage conditions. If the SUP voltage is below 1.4V (max) or above 13.7V (typ), the MAX8739 disables the gate driver of the step-up regulator and prevents the internal MOSFET from switching. The SUP undervoltage and overvoltage conditions do not set the fault latch.
MAX8739
Linear Regulator (LDO)
The MAX8739 includes an internal 5V linear regulator. SUP is the input of the linear regulator. The input voltage range is between 4.5V and 13V. The output of the linear regulator (LDO) is set to 5V (typ). The regulator powers all the internal circuitry including the gate driver. Bypass the LDO pin to AGND with a 0.22F or greater ceramic capacitor. SUP should be directly connected to the output of the step-up regulator. This feature significantly improves the efficiency at low-input voltages.
Thermal-Overload Protection
The thermal-overload protection prevents excessive power dissipation from overheating the device. When the junction temperature exceeds TJ = +160C, a thermal sensor immediately activates the fault protection, which shuts down the step-up regulator and the internal linear regulator, allowing the device to cool down. Once the device cools down by approximately 15C, cycle the input voltage (below the UVLO falling threshold) to clear the fault latch and reactivate the device. The thermal-overload protection protects the controller in the event of fault conditions. For continuous operation, do not exceed the absolute maximum junction temperature rating of TJ = +150C.
Bootstrapping and Soft-Start
The MAX8739 features bootstrapping operation. In normal operation, the internal linear regulator supplies power to the internal circuitry. The input of the linear regulator (IN) should be directly connected to the output of the step-up regulator. The MAX8739 is enabled when the input voltage at SUP is above 1.3V (typ) and the fault latch is not set. After being enabled, the regulator starts open-loop switching to generate the supply voltage for the linear regulator. The internal reference block turns on when the LDO voltage exceeds 2.7V (typ). When the reference voltage reaches regulation, the PWM controller and the current-limit circuit are enabled, and the step-up regulator enters soft-start. During soft-start, the main step-up regulator directly limits the peak-inductor current, allowing from zero up to the full current-limit value in eight equal current steps (ILIM/8). The maximum load current is available after the output voltage reaches regulation (which terminates soft-start), or after the soft-start timer expires in approximately 13ms. The soft-start routine minimizes the inrush current and voltage overshoot and ensures a welldefined startup behavior.
Design Procedure
Main Step-Up Regulator
Inductor Selection The minimum inductance value, peak-current rating, and series resistance are factors to consider when selecting the inductor. These factors influence the converter's efficiency, maximum output-load capability, transient response time, and output-voltage ripple. Physical size and cost are also important factors to be considered. The maximum output current, input voltage, output voltage, and switching frequency determine the inductor value. Very-high inductance values minimize the current ripple and therefore reduce the peak current, which decreases core losses in the inductor and I 2R losses in the entire power path. However, large inductor values also require more energy storage and more turns of wire, which increase physical size and can increase I2R losses in the inductor. Low-inductance values decrease the physical size but increase the current ripple and peak current. Finding the best inductor involves choosing the best compromise between circuit efficiency, inductor size, and cost.
Fault Protection
During steady-state operation, the MAX8739 monitors the FB voltage. If the FB voltage does not exceed 1V (typ), the MAX8739 activates an internal fault timer. If there is a continuous fault for the fault-timer duration, the MAX8739 sets the fault latch, shutting down all the
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15
TFT, LCD, DC-DC Converter with Operational Amplifiers
The equations used here include a constant LIR, which is the ratio of the inductor peak-to-peak ripple current to the average DC inductor current at the full load current. The best trade-off between inductor size and circuit efficiency for step-up regulators generally has an LIR between 0.3 and 0.5. However, depending on the AC characteristics of the inductor core material and ratio of inductor resistance to other power-path resistances, the best LIR can shift up or down. If the inductor resistance is relatively high, more ripple can be accepted to reduce the number of turns required and increase the wire diameter. If the inductor resistance is relatively low, increasing inductance to lower the peak current can decrease losses throughout the power path. If extremely thin, high-resistance inductors are used, as is common for LCD panel applications, the best LIR can increase to between 0.5 and 1.0. Once a physical inductor is chosen, higher and lower values of the inductor should be evaluated for efficiency improvements in typical operating regions. Calculate the approximate inductor value using the typical input voltage (VIN), the maximum output current (I MAIN(MAX) ), the expected efficiency ( TYP ) taken from an appropriate curve in the Typical Operating Characteristics, and an estimate of LIR based on the above discussion: V L = IN VMAIN
2
MAX8739
IIN(DC,MAX). For good efficiency, choose an inductor with less than 0.1 series resistance. Considering the Typical Operating Circuit, the maximum load current (IMAIN(MAX)) is 300mA, with an 8V output and a typical input voltage of 2.5V. Choosing an LIR of 0.4 and estimating efficiency of 85% at this operating point:
2.5V L= 8V
2
8V - 2.5V 0.85 x 3.0H x 0.4 0.3A x 1.2MHz
Using the circuit's minimum input voltage (2.2V) and estimating efficiency of 80% at that operating point: IIN(DC,MAX) = 0.3A x 8V 1.36A 2.2V x 0.8
The ripple current and the peak current are: IRIPPLE = 2.2V x (8V - 2.2V) 0.44 A 3.0H x 8V x 1.2MHz 0.44 A IPEAK = 1.36A + 1.58A 2
VMAIN - VIN TYP x x LIR IMAIN(MAX) x fOSC
Choose an available inductor value from an appropriate inductor family. Calculate the maximum DC input current at the minimum input voltage VIN(MIN) using conservation of energy and the expected efficiency at that operating point (MIN) taken from an appropriate curve in the Typical Operating Characteristics: IIN(DC,MAX) = IMAIN(MAX) x VMAIN VIN(MIN) x MIN
Output-Capacitor Selection The total output-voltage ripple has two components: the capacitive ripple caused by the charging and discharging of the output capacitance, and the ohmic ripple due to the capacitor's equivalent series resistance (ESR): VRIPPLE = VRIPPLE(C) + VRIPPLE(ESR) VRIPPLE(C) and: VRIPPLE(ESR) IPEAK x RESR where I PEAK is the peak inductor current (see the Inductor Selection section). For ceramic capacitors, the output voltage ripple is typically dominated by VRIPPLE(C). The voltage rating and temperature characteristics of the output capacitor must also be considered. Input-Capacitor Selection The input capacitor (CIN) reduces the current peaks drawn from the input supply and reduces noise injection into the IC. A 10F ceramic capacitor is used in the Typical Application Circuit (Figure 1) because of the high source impedance seen in typical lab setups. Actual applications usually have much lower source V IMAIN - VIN x MAIN COUT VMAIN x fSW
Calculate the ripple current at that operating point and the peak current required for the inductor: IRIPPLE = VIN(MIN) x (VMAIN - VIN(MIN) ) L x VMAIN x fOSC I IPEAK = IIN(DC,MAX) + RIPPLE 2
The inductor's saturation current rating and the MAX8739's LX current limit (ILIM) should exceed IPEAK and the inductor's DC current rating should exceed
16
______________________________________________________________________________________
TFT, LCD, DC-DC Converter with Operational Amplifiers
impedance since the step-up regulator often runs directly from the output of another regulated supply. Typically, CIN can be reduced below the values used in the Typical Application Circuit. Ensure a low noise supply at IN by using adequate CIN. Alternatively, greater voltage variation can be tolerated on CIN if IN is decoupled from CIN using an RC lowpass filter (see Figure 1). Rectifier Diode The MAX8739's high switching frequency demands a high-speed rectifier. Schottky diodes are recommended for most applications because of their fast recovery time and low forward voltage. In general, a 3A Schottky diode complements the internal MOSFET well. Output-Voltage Selection The output voltage of the main step-up regulator can be adjusted by connecting a resistive voltage-divider from the output (VMAIN) to AGND with the center tap connected to FB (see Figure 1). Select R2 in the 10k to 50k range. Calculate R1 with the following equation: V R1 = R2 x MAIN - 1 VFB where VFB, the step-up regulator's feedback set point, is 1.236V. Place R1 and R2 close to the IC. Loop Compensation Choose RCOMP to set the high-frequency integrator gain for fast transient response. Choose CCOMP to set the integrator zero to maintain loop stability. For low-ESR output capacitors, use the following equations to obtain stable performance and good transient response: RCOMP CCOMP 315 x VIN x VOUT x COUT L x IMAIN(MAX) VOUT x COUT 10 x IMAIN(MAX) x RCOMP
Applications Information
Power Dissipation
An IC's maximum power dissipation depends on the thermal resistance from the die to the ambient environment and the ambient temperature. The thermal resistance depends on the IC package, PC board copper area, other thermal mass, and airflow. The MAX8739, with its exposed backside pad soldered to 1in2 of PC board copper, can dissipate about 1.7W into +70C still air. More PC board copper, cooler ambient air, and more airflow increase the possible dissipation, while less copper or warmer air decreases the IC's dissipation capability. The major components of power dissipation are the power dissipated in the stepup regulator and the power dissipated by the operational amplifiers. Step-Up Regulator The largest portions of power dissipation in the step-up regulator are the internal MOSFET, inductor, and the output diode. If the step-up regulator has 90% efficiency, about 3% to 5% of the power is lost in the internal MOSFET, about 3% to 4% in the inductor, and about 1% in the output diode. The remaining 1% to 3% is distributed among the input and output capacitors and the PC board traces. If the input power is about 5W, the power lost in the internal MOSFET is about 150mW to 250mW. Operational Amplifier The power dissipated in the operational amplifiers depends on their output current, the output voltage, and the supply voltage: PDSOURCE = IOUT_SOURCE x (VSUP - VOUT_) PDSINK = IOUT_(SINK) x VOUT_ where IOUT_(SOURCE) is the output current sourced by the operational amplifier, and IOUT_(SINK) is the output current that the operational amplifier sinks. In a typical case where the supply voltage is 10V and the output voltage is 5V with an output source current of 30mA, the power dissipated is 150mW.
MAX8739
To further optimize transient response, vary RCOMP in 20% steps and CCOMP in 50% steps while observing transient response waveforms.
______________________________________________________________________________________
17
TFT, LCD, DC-DC Converter with Operational Amplifiers MAX8739
PC Board Layout and Grounding
Careful PC board layout is important for proper operation. Use the following guidelines for good PC board layout: 1) Minimize the area of high-current loops by placing the inductor, output diode, and output capacitors near the input capacitors and near the LX and PGND pins. The high-current input loop goes from the positive terminal of the input capacitor to the inductor, to the IC's LX pin, out of PGND, and to the input capacitor's negative terminal. The highcurrent output loop is from the positive terminal of the input capacitor to the inductor, to the output diode (D1), to the positive terminal of the output capacitors, reconnecting between the output capacitor and input capacitor ground terminals. Connect these loop components with short, wide connections. Avoid using vias in the high-current paths. If vias are unavoidable, use many vias in parallel to reduce resistance and inductance. 2) Create a power-ground island (PGND) consisting of the input and output capacitor grounds, PGND pin, and any charge-pump components. Connect all these together with short, wide traces or a small ground plane. Maximizing the width of the power-ground traces improves efficiency and reduces output voltage ripple and noise spikes. Create an analog ground plane (AGND) consisting of the AGND pin, all the feedback-divider ground connections, the operational-amplifierdivider ground connections, the COMP and DEL capacitor ground connections, the SUP and LDO bypass capacitor ground connections, and the device's exposed backside pad. Connect the AGND and PGND islands by connecting the PGND pin directly to the exposed backside pad. Make no other connections between these separate ground planes. 3) Place the feedback-voltage-divider resistors as close to the feedback pin as possible. The divider's center trace should be kept short. Placing the resistors far away causes the FB traces to become antennas that can pick up switching noise. Care should be taken to avoid running any feedback trace near LX or the switching nodes in the charge pumps. 4) Place IN pin and LDO pin bypass capacitors as close to the device as possible. The ground connections of the IN and LDO bypass capacitors should be connected directly to the AGND pin with a wide trace. 5) Minimize the length and maximize the width of the traces between the output capacitors and the load for best transient responses. 6) Minimize the size of the LX node while keeping it wide and short. Keep the LX node away from the feedback node and analog ground. Use DC traces as shield if necessary. Refer to the MAX8739 evaluation kit for an example of proper board layout.
Pin Configuration
POS2 FREQ SUP
15
14
13
LX
IN
TOP VIEW
12
FB COMP DEL CTL DRN
11
16 17 18 19 20
10 9 8 7 6
NEG2 OUT2 OUT1 NEG1 POS1
MAX8739
1
2
3
4
PGND
COM
SRC
LDO
TQFN 5mm x 5mm
Chip Information
TRANSISTOR COUNT: 4396 PROCESS: BiCMOS
18
______________________________________________________________________________________
AGND
5
TFT, LCD, DC-DC Converter with Operational Amplifiers
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
MAX8739
D2 D D/2 MARKING k L E/2 E2/2 E (NE-1) X e
C L C L
b D2/2
0.10 M C A B
AAAAA
E2
PIN # 1 I.D.
DETAIL A
e (ND-1) X e
e/2
PIN # 1 I.D. 0.35x45 DETAIL B
e
L1
L
C L
C L
L
L
e 0.10 C A 0.08 C
e
C
A1 A3
PACKAGE OUTLINE, 16, 20, 28, 32, 40L THIN QFN, 5x5x0.8mm
-DRAWING NOT TO SCALE-
21-0140
I
1
2
COMMON DIMENSIONS
PKG. 16L 5x5 20L 5x5 28L 5x5 32L 5x5 40L 5x5 SYMBOL MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX.
EXPOSED PAD VARIATIONS PKG. CODES T1655-2 T1655-3 T1655N-1 T2055-3
D2
3.10 3.10 3.10 3.10 3.10 3.25 3.25 2.70 2.70 3.25 2.70 3.25 3.25 3.10 3.10 3.10 3.10 3.30 3.20 3.20 3.20 3.20 3.20 3.35 3.35 2.80 2.80 3.35 2.80 3.35 3.35 3.20 3.20 3.20 3.20 3.40 3.00 3.00 3.00 3.00 3.00 3.15 3.15 2.60 2.60 3.15 2.60 3.15 3.15 3 3.00 3 3.00 3.00 3.00 3.20
E2
exceptions
L
A A1 A3 b D E e k L
MIN. NOM. MAX. MIN. NOM. MAX. 0.15
0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 0 0.02 0.05 0 0.02 0.05 0 0.02 0.05 0 0.02 0.05 0 0.02 0.05 0.20 REF. 0.20 REF. 0.20 REF. 0.20 REF. 0.20 REF. 0.25 0.30 0.35 0.25 0.30 0.35 0.20 0.25 0.30 0.20 0.25 0.30 0.15 0.20 0.25 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 0.65 BSC. 0.50 BSC. 0.40 BSC. 0.80 BSC. 0.50 BSC.
DOWN BONDS ALLOWED
- 0.25 - 0.25 0.25 - 0.25 - 0.25 0.35 0.45 0.30 0.40 0.50 0.45 0.55 0.65 0.45 0.55 0.65 0.30 0.40 0.50 0.40 0.50 0.60 L1 - 0.30 0.40 0.50 16 40 N 20 28 32 ND 4 10 5 7 8 4 10 5 7 8 NE WHHB ----WHHC WHHD-1 WHHD-2 JEDEC
NOTES: 1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. 4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE. 5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 mm AND 0.30 mm FROM TERMINAL TIP.
3.00 3.00 3.00 3.00 3.00 T2055-4 T2055-5 3.15 T2855-3 3.15 T2855-4 2.60 T2855-5 2.60 3.15 T2855-6 T2855-7 2.60 T2855-8 3.15 T2855N-1 3.15 T3255-3 3.00 T3255-4 3.00 T3255-5 3.00 T3255N-1 3.00 T4055-1 3.20
3.10 3.10 3.10 3.10 3.10 3.25 3.25 2.70 2.70 3.25 2.70 3.25 3.25 3.10 3.10 3.10 3.10 3.30
3.20 3.20 3.20 3.20 3.20 3.35 3.35 2.80 2.80 3.35 2.80 3.35 3.35 3.20 3.20 3.20 3.20 3.40
** ** ** ** ** 0.40 ** ** ** ** ** 0.40 ** ** ** ** ** **
YES NO NO YES NO YES YES YES NO NO YES YES NO YES NO YES NO YES
** SEE COMMON DIMENSIONS TABLE
6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY. 7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. 8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. 9. DRAWING CONFORMS TO JEDEC MO220, EXCEPT EXPOSED PAD DIMENSION FOR T2855-3 AND T2855-6. 10. WARPAGE SHALL NOT EXCEED 0.10 mm. 11. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY. 12. NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY. 13. LEAD CENTERLINES TO BE AT TRUE POSITION AS DEFINED BY BASIC DIMENSION "e", 0.05.
PACKAGE OUTLINE, 16, 20, 28, 32, 40L THIN QFN, 5x5x0.8mm
-DRAWING NOT TO SCALE-
21-0140
I
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 19 (c) 2006 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.
QFN THIN.EPS

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